High-speed serial links are becoming more common, replacing bulkier parallel connectors. Speeds for these high-speed serial links vary according to differing industry standards. Serial interface chips generally require the use of a phase-locked loop (PLL) to generate a clock for data transmission, and another PLL for data reception.
Fast PLL circuits employ fast voltage controlled oscillators (VCO). The operating speed of the VCO determines what frequencies the serial interface chips will operate. Different operating speeds are accomplished by frequency division and multiplication. However, if an operating speed cannot be achieved through frequency division and multiplication, an additional VCO must be incorporated into the design. The chip could be programmed to operate at the different operating speeds by choosing the appropriate oscillator.
In reality, only a couple of the operating speeds can be achieved using frequency division and multiplication. VCO ranges are only so large, and adding an additional VCO complicates design and uses more silicon area. A simpler solution would be to have a single VCO that would operate in different frequency ranges. Having the ability for one integrated circuit chip to achieve several operating speeds would also be beneficial.
The operating range of a VCO (i.e. the range of possible output frequencies for a particular range of input voltages) is another important aspect to consider when designing a fast PLL circuit. One way to implement a VCO is by use of a ring oscillator. Ring oscillators can be derived from cascaded delay cells. The number of delay cells, and the delay time of each delay cell, determines the operating frequency. The delay time of the delay cell can vary with temperature, supply voltage and process, sometimes pushing the operating range far from the desired operating point.
In phase-locked loop applications, voltage controlled ring oscillators with starved inverter delay cells are sometimes used when designing CMOS integrated circuits. Using booster inverters in parallel with the starved inverter delay cells results in a faster operating frequency. However, the frequency range is limited at the low end of the frequency range due to the booster inverter. There is a tradeoff between how large the booster inverter is and how high the frequency range is, and how small the booster inverter is and how low the frequency range is. In summary, the addition of a booster inverter increases the speed of the oscillator, but limits the frequency range of the oscillator.
When designing high frequency VCOs, frequency drift (from the desired operating point) due to process variation can cause a low yield. If the frequency range could be extended to obtain overlap between process variations, a higher yield could, be obtained.